This invention relates generally to a pipelined processor, and more particularly to obtaining data in a pipelined processor.
High performance processors are typically pipelined. Pipelining is a method of processing that allows for fast concurrent processing of data. This is accomplished by overlapping operations by using multiple stages of processes where information is passed from one process to another process. Most processor instructions have to go through the same basic sequence: the instruction must be fetched, it must be executed, and its results must be stored. The pipelining method fetches and decodes instructions in which, at any given time, several program instructions are in various stages of being fetched or decoded. Pipelining improves the speed of system execution time by ensuring that the microprocessor does not have to wait for the previous instruction to complete before beginning work on the next instruction. When the processor completes execution of one instruction, the next instruction is ready to be performed.
Some software instructions in certain instruction set architectures are too complicated to be executed by simply flowing through the logic in the central processor. Some of these complicated instructions are broken down into “sub-programs” which use multiple, existing simpler instructions to perform the complicated function that the instruction is designed to perform. One form of these “sub-programs” is known as millicode. Millicode is similar to vertical micro code. In general, millicode instructions may utilize storage locations and special instructions that are not available to the higher level instructions.